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Parallelism

  1. How do your Optimizers determine your board-to-wave parallelism?

     

  2. What types of defects are often caused when your boards are not parallel to your solder waves?

     

  3. What is the range of the parallelism data you want to see prior to beginning production each shift?

     

  4. If your parallelism readings are outside of this range, name at least six steps should you take.

     

  5. Why is it important to know on which sets of fingers you ran your Optimizers?

     

  6. What do daily parallelism measurements have to do with preventing your fingers from causing defects?

     

  7. Why does verification of your parallelism every shift eliminate disparallelisms as a cause of board defects? Why is verification necessary every shift rather than weekly? Why do we consider this the most important question of this parallelism section?

     

 

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